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Digital Signal Processing ASIC R&D Engineer

Leuven, Belgium

Leuven, Leuven, Belgium

Posted Sep 2, 2026Availability needs checking · last checked Oct 31, 2026
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About this role

Overview

Keysight is a mission-critical design enablement partner for organizations solving the world’s most complex engineering challenges. With deep engineering expertise and leading design, emulation, and test solutions, our ~16,800 employees help customers in over 100 countries accelerate innovation across communications, automotive, energy, quantum, aerospace and defense, semiconductor, and artificial intelligence markets. Learn more about what we do.

At Keysight, people come together to explore new ideas, challenge what's possible, and advance the technologies defining the future. Here, you'll find opportunities to do your best work, take your career further, and thrive in an award-winning culture. Learn more about our benefits.

This job opening is with the Keysight Hardware Labs ASIC Team in Leuven, Belgium (EU). We're conveniently located right next to the Leuven railway station.

Keysight Labs is a central R&D organization, enabling Keysight to be first to market with breakthrough products and solutions.

Digital Signal Processing (DSP) and Mixed Signal Application Specific ICs (ASICs), tailor-made at Keysight Labs, are a major success factor for the company and continue to drive the performance and value of Keysight's new products.

In our team the Applied Research & Development for these ASICs is the core of our specialty and expertise.

Bringing the algorithm to silicon is what we do daily.

Responsibilities

We have an exciting job opportunity for a Digital Signal Processing ASIC R&D Engineer.

You will be developing cutting edge designs among some of the best talent in industry. You will be working in an international team, playing a significant role in exploring and designing DSP algorithms and Digital Designs, using state-of-the-art Electronic Design Automation (EDA) tools, directly impacting the key specs of Keysight's future products.

As member of the ASIC team your Major Responsibilities will be:

  • To research, design and verify digital / DSP and mixed signal ASICs that meet Test & Measurement product functionality, quality, and schedule requirements, supervised by the project’s technical lead.
  • To code, verify and document your designs, and to synthesize and iterate them to timing closure with state-of-the-art EDA tools.

Qualifications

You hold a master’s degree or PhD in either Electronics and Chip Design, Information Systems and Signal Processing, Computer Sciences, Applied Physics or equivalent.

You have a full professional working proficiency in both spoken and written English.

You have a Belgian Work Permit.

It's a plus if you have experience with any of the following (or you are willing to learn soon):

  • Matlab, Python, SystemC..
  • The ASIC and/or FPGA design and verification process i.e.:
  • RTL design entry (VHDL or Verilog).
  • RTL simulation (Mentor, Cadence, ...).
  • Logic Synthesis and Timing Closure (Synopsys, Cadence).
  • Linux
  • Git
  • Elementary professional working proficiency in Dutch.

Personal Qualities:

  • You demonstrate strong and clear communication, analysis, and problem-solving skills.
  • You have a strong affinity with Digital Design, Engineering Mathematics and Digital Signal Processing.
  • You are an avid programmer e.g. in Python.
  • You have a proven track record as a team player.
  • You show design creativity, and you are always eager to learn.
  • You’re self-reliant, flexible and show a can-do attitude.
  • You are committed to work accurately, delivering high quality results, on time.

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***

From Keysight Technologies’s career feed. View the original listing