Lead Design Engineer
PUNE
· full time
Posted Mar 13, 2024Availability needs checking · last checked Nov 3, 2026
Check my fit on this page About this role
AT CADENCE, WE HIRE AND DEVELOP LEADERS AND INNOVATORS WHO WANT TO MAKE AN IMPACT ON THE WORLD OF TECHNOLOGY.
3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills.
WE’RE DOING WORK THAT MATTERS. HELP US SOLVE WHAT OTHERS CAN’T.
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